Chipmaking giants like Intel, Samsung, and TSMC see a future where key parts of silicon transistors are replaced with semiconductors that are only a few atoms thick. Although they’ve reported progress toward that goal, that future is generally thought to be more than a decade away. Now a startup spun out of MIT thinks it has cracked the code for making commercial-scale 2D semiconductors, and expects chipmakers to have integrated them in advanced chips in half that time.
CDimension has developed a process for growing molybdenum disulfide (MoS2), a 2D semiconductor, on silicon at a low-enough temperature that it will not damage underlying silicon circuits. That could allow the integration of layers of 2D transistors above existing silicon circuits and eventually multi-tiered 3D chips made from 2D devices.
“A lot of people think of 2D semiconductors as something that’s still in the laboratory,” says CDimension CEO and co-founder Jiadi Zhu. “But CDimension has a proprietary tool designed for 2D material growth… and we’ve addressed a lot of critical [2D materials] problems regarding wafer-scale uniformity, regarding device performance and variation, regarding device reliability, and regarding compatibility with silicon manufacturing processes.” Taken together, 2D semiconductors are ready to enter an industrial phase of development, he says.
Much of CDimension’s plans hinge on a proprietary process that it uses to grow a single layer of MoS2 on silicon and other substrates at only about 200 °C across entire 300 millimeter wafers. 2D materials are formed by chemical vapor deposition, wherein vaporized precursor chemicals react on a surface to coat it. But typically the reactions for making 2D materials requires temperatures upwards of 1000 °C. That’s so high it would damage any underlying structures needed to make transistors. Today researchers get around that problem by depositing the 2D semiconductor separately and then delicately transferring it to a silicon wafer. But CDimension’s system can grow the materials right on the silicon wafer without damage.
The 2D Semiconductor Business
Part of the startup’s business right now is to ship silicon wafers with 2D material grown on it so customers can evaluate it and build devices. Alternatively, customers can send wafers that have already been processed so that they have silicon circuits or structures on them. CDimension can then grow MoS2 or other 2D materials atop that and send it back to the customers, so they can integrate a layer of 2D devices with their silicon circuits.
A test wafer made with CDimension’s process sits underneath a microscope.CDimension
The latter might be 2D semiconductor’s first industrial entry. “We’re showing the possibilities with silicon plus 2D material,” Zhu says. “But 2D material might be used for the highly-scaled logic devices as well. That can be the next step.”
Chipmakers like Intel, Samsung, and TSMC reported research aimed at replacing silicon nanosheets in their future transistors with MoS2 and other 2D semiconductors at the IEEE International Electron Device Meeting in December 2024. At the same conference, Zhu and his colleagues from the MIT laboratories of IEEE Fellow Tomás Palacios and Jing Kong showed that the low-temperature synthesis could produce MoS2 transistors with multiple stacked channels, akin to nanosheet transistors. (Palacios is a strategic advisor to CDimension.) By scaling down the device, the team predicted that such devices could meet and exceed the requirements of the future 10A (1-nanometer) node in terms of power consumption, performance, and the area they occupy.
A big motivation to go with 2D semiconductors is to reduce power consumption, says Zhu. Power is lost in transistors both when they are on (dynamic power) and when they are off (static power). Because it’s just over 0.6 nanometers thick, 2D transistors have qualities that could let them operate using about half the voltage of today’s silicon devices, saving dynamic power. When they are off, it’s leakage current you have to worry most about. But MoS2 has a bandgap that’s more than twice the value of silicon’s, meaning it takes much more energy for charge to leak across the device. Zhu says devices made using CDimension’s materials consumed as little as one-thousandth the energy of silicon devices.
In addition to MoS2, which is an electron-conducting (n-type) semiconductor, the startup also provides tungsten diselenide, a p-type semiconductor, as well as 2D insulating films, such as hexagonal boron nitride. The whole combination will be needed if 2D semiconductors are to ever take over in future CMOS chips.
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